A bug in Intel’s Haswell CPU core TSX instructions has stopped developers from using the chip function, according to Techreport
The TSX instructions promise to make certain types of multithreaded applications run much faster than they can today.
But that work may stop because Haswell’s TSX implementation has bugs that can cause critical software failures.
Intel revealed the news of the bug to a group of hacks during briefings in Portland last week. The TSX problem was apparently discovered by a software developer outside of Intel and it is a cock up of huge proportions. Bugs of this size aren’t often discovered this late in the life of a CPU core.
Intel has disabled the TSX instructions in current products using a CPU microcode update delivered via new revisions of motherboard firmware.
While disabling TSX should ensure stable operation for Haswell CPUs, it does mean that those chips will no longer be capable of supporting TSX’s features, including hardware lock elision and restricted transactional memory.
If any software developer does want to work with TSX will have to avoid updating their systems to newer firmware revisions and retain the risk of TSX-related memory corruption or crashes.
The bug was discovered too late to be fixed in the first revision of Intel’s upcoming Broadwell Y-series chips and will not be part of the Core M-based tablets to be released later this year. First production Broadwell chips will also have TSX disabled via microcode.
Intel said that it will have a fix for Broadwell’s next incarnation. Given that most Haswell and all Broadwell systems affected are shipping in consumer-class systems, the impact of this TSX snafu should be small. TSX is mostly for server-class applications. Intel’s server-class Xeon lineup relies on the older Ivy Bridge core, which lacks TSX.
