Los Alamos National Laboratory in New Mexico is getting a next-generation $174 million supercomputer based around Intel’s Knight’s Landing Chip.
Dubbed “Trinity” the supercomputer will maintain the safety and effectiveness of the nation’s nuclear weapons.
Ordered by the National Nuclear Security Administration the computer is being developed with Cray and will be housed at Los Alamos’ Metropolis Computing Centre.
Officials say Trinity will run the largest and most demanding simulations of stockpile stewardship, assuring the safety, security, and effectiveness of the country’s nuclear stockpile without underground testing.
Cray is using an array of new computer technologies in Trinity, and when it is delivered in 2015 it could be the fastest in the world. The world’s fastest computer is Tianhe-2 at China’s National University of Defence Technology, which delivers 33.86 petaflops of peak performance which should give you an idea how fast Trinity will go.
The Linux-based Trinity supercomputer will use Cray’s latest Aries interconnect will contribute to the speed boost, connecting server closets, processors, storage arrays and other components..
Trinity will have 82 petabytes of distributed storage, some of the highest capacity Cray has put into a supercomputer. It will provide throughput of 1.7Tbps (terabytes per second) for internal data transfers. The supercomputer will use the Lustre file system.
Trinity will have Intel’s Xeon Phi processors code-named Knights Landing, which can deliver 3 teraflops of peak performance, making it Intel’s single fastest chip to date. Knights Landing is based on Intel’s Silvermont CPU architecture, which is the basis for the chip maker’s latest smartphone and tablet chips.
The Knights Landing chipset will have Micron’s Hybrid Memory Cube technology, which provides speed and power efficiency upgrades over DDR memory. HMC provides 15 times more bandwidth than DDR3 DRAM and draws 70 percent less energy, with five times more bandwidth than the emerging DDR4 memory.
AMD’s next-gen APU, codenamed Kaveri, won’t be coming to market this year. Although AMD plans to launch and ship the chip toward the end of the year, it won’t appear in the channel until February 2014.
Earlier this week tech site VR Zone reported that Kaveri would be delayed, which was no surprise as few people expected it to show up this year. AMD’s roadmap indicates that the chip is indeed launching this year, but in its response AMD has now officially confirmed that availability is expected in early 2014.
Kaveri is AMD’s fourth generation mid-range APU. It will pack up to four Steamroller CPU cores and it will be the first AMD APU to feature GCN graphics. The previous two generations were 32nm parts based on Piledriver CPU cores and WLIW4-based GPUs, hence the 28nm Kaveri with a brand new CPU and GPU cobmo looks like a huge upgrade.
Mobile Kaveri chips should start shipping later in 2014, AMD said.
It should be noted that the new chips will require FM2+ compatible motherboards and the first boards were launched by Asus a few weeks ago. Although they are backwards compatible with FM2 parts, they don’t appear to be a worthwhile investment at this point. There is still plenty of time to stock up on FM2+ boards before Kaveri shows up.
An interview with AMD last week shed light on the latest battleground between Intel and AMD which underlies future changes in computing. In a meeting with corporate vice president for global channel sales, Roy Taylor, he said both AMD and Intel are investing in microprocessor architectures which give equal prominence to both serial and parallel computing. And he claimed AMD is ahead of the game.
Using both the CPU as a serial processor and the GPU as a parallel or GPGPU (General Purpose GPU) processor these new devices form a category that AMD calls the APU. The APU will be the bedrock of a new generation of x86 based HSA or Heterogeneous System Architecture devices. Current generation APUs such as Sandy Bridge, Ivy Bridge and the forthcoming Haswell parts from Intel, and AMD’s Trinity and Richland parts from AMD still use separate memory configurations, with each processor having its own defined memory block.
But future devices in 2014, said Taylor, will use single memory configurations, allowing both the CPU and GPU to dynamically share a single memory array and be true HSA enabled processors. Intel’s introduction of an L4 cache to speed up the performance between its CPU and GPU is also an indication of its intentions.
In defense of his argument for APU as a new microprocessor category, Taylor showed a diagram that illustrated the increasing commitment by Intel to a larger GPU configuration in its APU generations. These indicated, he said, the need for successful HSA architectures to be balanced.
APUs and Open CL
The growth and success of Open CL, which is able to take advantage of APU devices by using the GPU to accelerate parallel functions, is further ammunition to the establishment of the category, said Taylor. Popular applications such as Handbrake for transcoding, and VLC Player for watching movies, take advantage of this open standard maintained by Khronos and supported by AMD, Apple, IBM, Intel and Nvidia. Open CL received a strong endorsement last week by the announcement by Adobe that it is using Open CL to hardware accelerate its Premier Pro product.
Since HTML5 also takes advantage of GPU acceleration it seems to make sense that in the future we will see APUs used wherever there is a need for a device which can replace the traditional but separate PC configuration of having a separate CPU and GPU. “That configuration makes sense for higher end systems’”, said Taylor. But in the meantime currently available APU performance is surprisingly strong, he said. To this end he went on to show the performance of AMD current APUs compared to Intel’s or configurations using both Intel and a separate Nvidia GPU together.
When asked what this meant for the channel, Taylor said that at a time of austerity, being able to build relatively high performance desktop and notebook computers at a fraction of their traditional prices could have a huge impact. He may be right but only if system builders and e-tailers recognise the value of the new category and get behind it.
A quick read of the HSA Foundation website seems to show a significant ground swell behind the use of balanced compute architectures. With companies like Qualcomm, ARM, Imagination Technologies and Samsung also investing in HSA it does seem that we can expect to see strong developments in this area. It will be interesting to see what Microsoft thinks of the use of APUs to power Windows and whether the software community in general gets behind the category too.
We contacted Intel in Santa Clara for comment but at the time of press had not received a response.