Team builds high rise semiconductor

The image depicts today's single-story electronic circuit cards, where logic and memory chips exist as separate structures, connected by wires. Like city streets, those wires can get jammed with digital traffic going back and forth between logic and memory. On the right, Stanford engineers envision building layers of logic and memory to create skyscraper chips. Data would move up and down on nanoscale "elevators" to avoid traffic jams.Researchers from Stanford said they have successfully demonstrated the ability to build semiconductors that combine logic and memory chips in a “high rise” configuration.

The engineers said they have created a new technology to produce transistors, a new type of memory that is ideal for multiple levels and a different way of building the high rise structures.

Subhasish Mitra, a Stanford professor, claimed the design and fabrication techniques are scalable.  “With further  development this architecture could lead to computing performance that is much, much grater than anything available today,” h said.

Heat generated by silicon chips has been a problem for decades and leakage drains batteries.  The team uses carbon nanotubes (CNTs) and solved the big problem of putting enough of these into a small area to make a useful chip.

The engineers grow CNTs on round quartz wafer and created a metal film allowing them to lift a heap of CNTs off the quartz base and put it into a silicon wafer.

The new type of memory uses titanium nitride, hafnium oxide and platinum to create metal-oxide-metal “sandwich” and use electrical switches to make conductive/resistive zeroes and ones. The researches dub this resistive random access memory (RRAM). It can be made at much lower temperatures than silicon memory.