Alexander Liddle, a materials scientist at NIST pointed out that Intel has just gone into production on a 14 nanometre generation of chips.
Liddle explained that at these sizes the problem is creating multiple masking layers and optical lithography “is simply not capable of reliably reproducing the extremely small extremely densie patterns. There are tricks you can use such as creating multiple, overlapping masks, but they are very expensive,” he said.
He said two pieces of research by NIST, by IBM and by MIT show a way to deposit thin films of a polymer on a template so that it self-assembles into precise even rows 10 nanometres wide.
“The problem in semiconductor lithography is not really making small features – you can do that but you can’t pack them together,” he said. “Block co-polymers take advantage of the fact that if you make small features relatively far apart, you can put the block co-polymer on those guiding patterns and fill in the small details,” he said.
He’s optimistic that the NIST model will give him accurate results.